Kougar
07-12-2006, 03:34 AM
This could be interesting... with BBUL the Core of the CPU will no longer be exposed be instead be flush with the surface of the chip itself. So would current methods for how we currently cool these things have to change, or not really?
Intel may finally use BBUL
Recent reports suggest that Intel is working on research for 32-core CPUs by 2010. The new processor will contain a total of 24MB of last-level LL cache split among processor nodes. The CPU is anticipated to contain eight processor nodes with four cores per node and 3MB of LL cache to each node. Intel says that BBUL packaging method (which was actually announced back in 2001) will be just as crucial to attaining these specifications as is reducing transistor size.
Intel says that today's packaging requires too many layers, and the processor core is exposed, making it prone to damage. Current processors place the die on top of a package, connected by C4 bumps, just like ball grid array (BGA) chips. The packaging layer itself consists of three separate layers: two outer copper interconnecting layers sandwiching a center plastic core layer with holes drilled by lasers and filled with copper. The pins that actually allow the processor to interface with a motherboard socket are attached to the bottom copper interconnection layer.
With BBUL, Intel removes top interconnect layer altogether. The processor core is actually embedded into the core layer with only its top surface exposed. The bottom interconnect layer is built-up, or "grown," from the processor core. One major limiting factor that BBUL eliminates is the need to use C4 bumps to connect the processor die to the packaging. As processors become more complex and contain more cores, more interconnects are required and as a result, C4 bumps are hitting their limit in terms of size and density.
Massive photo for your wallpaper: http://images.dailytech.com/nimage/2043_large_20011008tech_bbul.jpg (http://images.dailytech.com/nimage/2043_large_20011008tech_bbul.jpg) :wink:
Link to the rest of the article: http://www.dailytech.com/article.aspx?newsid=3218 (http://www.dailytech.com/article.aspx?newsid=3218)
Intel may finally use BBUL
Recent reports suggest that Intel is working on research for 32-core CPUs by 2010. The new processor will contain a total of 24MB of last-level LL cache split among processor nodes. The CPU is anticipated to contain eight processor nodes with four cores per node and 3MB of LL cache to each node. Intel says that BBUL packaging method (which was actually announced back in 2001) will be just as crucial to attaining these specifications as is reducing transistor size.
Intel says that today's packaging requires too many layers, and the processor core is exposed, making it prone to damage. Current processors place the die on top of a package, connected by C4 bumps, just like ball grid array (BGA) chips. The packaging layer itself consists of three separate layers: two outer copper interconnecting layers sandwiching a center plastic core layer with holes drilled by lasers and filled with copper. The pins that actually allow the processor to interface with a motherboard socket are attached to the bottom copper interconnection layer.
With BBUL, Intel removes top interconnect layer altogether. The processor core is actually embedded into the core layer with only its top surface exposed. The bottom interconnect layer is built-up, or "grown," from the processor core. One major limiting factor that BBUL eliminates is the need to use C4 bumps to connect the processor die to the packaging. As processors become more complex and contain more cores, more interconnects are required and as a result, C4 bumps are hitting their limit in terms of size and density.
Massive photo for your wallpaper: http://images.dailytech.com/nimage/2043_large_20011008tech_bbul.jpg (http://images.dailytech.com/nimage/2043_large_20011008tech_bbul.jpg) :wink:
Link to the rest of the article: http://www.dailytech.com/article.aspx?newsid=3218 (http://www.dailytech.com/article.aspx?newsid=3218)