AMD Demonstrates 4x4 Enthusiast System

[werty316]

Quite interesting to me but I wanna see a true Quadcore.


This morning, the home office of AMD demonstrated a 4x4 enthusiast system, affectionately referred to as the “Quad Father”, running a variety of different multi-threaded applications. Among the demonstrations given, Half Life 2 was run while playing MP3 audio and MPEG4 video running in the background.

AMD, in an attempt to appeal to the entire enthusiast market (not just the high-end enthusiast market) , promised dual CPU bundles for well below $1,000. AMD says they are targeting what they call the Mega-tasking enthusiast, those of us who use their machines for everything, all the time. Hopefully this little nugget of information will hold you over for now, we’ll have more details for you soon.

Article Source: http://www.hardocp.com/news.html?news=MjAzMTgsLCxobmV3cywsLDE=

[GIBSON]

NO this won't hold me for now :mrgreen: Sounds really interesting. I'd like to see what the 4x4 system can do compared to a conroe rig.

[werty316]

For mutli-tasking, it probaby owns since its two dualcores.

[Kougar]

People have been (Rightfully) bashing Intel for years about the huge heat and power draw issues of their Netburst processors...

So now they want to take the Athlon X2 which generates more heat and consumes more power than Conroe, double them, and then double the memory too just to beat a dual-core outfitted Intel rig? Is it just me, or am I missing something here... ;)

[GIBSON]

People have been (Rightfully) bashing Intel for years about the huge heat and power draw issues of their Netburst processors...

So now they want to take the Athlon X2 which generates more heat and consumes more power than Conroe, double them, and then double the memory too just to beat a dual-core outfitted Intel rig? Is it just me, or am I missing something here... ;)
AMD is indeed out of the game for the next few months. That however doesn't mean I can't be curious what they can pull out of their sleeves at a cost that I sure can't afford and sure can't compete with the conroe's pricetag.

[werty316]

Well AMD does need something to fight the Core2Duo since they just dived into DDR2 and are now behind Intel. For any apps/games that can use four cores, thats another question.

[GIBSON]

AMD needs something to fight the Core2Duo since they are just dived into DDR2 and are behind Intel.
well, DUH
It'll just be fit for what the amd rep said, megatasking. If software developers get code out there that supports multicore (not just plain dualcore) cpu's than that should yield some nice performance gains.

[Das Capitolin]

AMD needs something to fight the Core2Duo since they are just dived into DDR2 and are behind Intel. For any apps/games that can use four cores, thats another question.

Well of course they are going to debut this to retaliate against the Conroe/ Core2Duo. They have to, just to keep appearances up.

As for the apps and games: once developers build for multicore architecture it will not matter how many cores there are.

[werty316]

Geeze you guys don't have to be like that regarding my post :roll:

The key word is if software developers make apps/games capable of using a quadcore CPU; there really aren't alot of apps/games that took advantage of dualcore CPUs.

[nam-ng]

People have been (Rightfully) bashing Intel for years about the huge heat and power draw issues of their Netburst processors...

So now they want to take the Athlon X2 which generates more heat and consumes more power than Conroe, double them, and then double the memory too just to beat a dual-core outfitted Intel rig? Is it just me, or am I missing something here... ;)
It isn't just you, most people actually do miss something here.

AMD used 90nm, it is an amazing technical feat that they are able to implement quad-core at all. I can't wait to see what their engineering team could really do using 60nm or 45nm process technology.

What amazing designs did Intel have using 90nm? Do they even have hi-performance dual-core using 90nm? Right now the only technical edge Intel had is from leveraging hugely expensive finer process technology, and ZERO technical edge from processor designs.

[GIBSON]

It isn't just you, most people actually do miss something here.

AMD used 90nm, it is an amazing technical feat that they are able to implement quad-core at all. I can't wait to see what their engineering team could really do using 60nm or 45nm process technology.

What amazing designs did Intel have using 90nm? Do they even have hi-performance dual-core using 90nm? Right now the only technical edge Intel had is from leveraging hugely expensive finer process technology, and ZERO technical edge from processor designs.
While I clearly see your point you must admit though that conroe's design is pretty good atm. As not to say superior. I completely agree in the fact that intel has a far more comfortable situation though. They have huge amounts of cash, they have the scale advantage. And well, there are still a lot of conservative people out there who only want to buy intel no matter what.

[nam-ng]

While I clearly see your point you must admit though that conroe's design is pretty good atm. As not to say superior.I completely agree in the fact that intel has a far more comfortable situation though. They have huge amounts of cash, they have the scale advantage.
Ha ha... It is improved over older Intel designs because it used/incorporated add-on Distributed Processing features which AMD had been using for many years already. :D

"...a Symmetric Processing design which does ONE THING AT A TIME (one data stream at a time), rated by bus-width and clock frequency..."

Intel's Conroes could no longer be rated just by pure bus-width and clock frequency like P4s series. Perhaps they will learn to rate it using the same AMD way.
And well, there are still a lot of conservative people out there who only want to buy intel no matter what.
Most people are slow learners hence the existence of "ignorant masses". They actually thought AMD will have to copy what Intel had done to Conroes. They probably had read the below from AMD's Henri Richard and not comprehended the facts in it...

"I saw recently a comparison of what's been disclosed of the NGMA, compared to what's been disclosed of the AMD K8 architecture, in the sense of predictive branching, buffering, pipelining and so on. And when you look at their NGMA, it looks like the K8 more than anything else. As they move away from Prescott and into their new products, it's really a mirror, a much closer mirror image of the K8 than previously, with the exception of course of the integrated memory controller."

Pertinent link to the immediate quote above (http://www.digitimes.com/bits_chips/a20060313PR201.html).

[GIBSON]

Ha ha... It is improved over older Intel designs because it used/incorporated add-on Distributed Processing features which AMD had been using for many years already. :D
I actually meant features like the unified cache on conroe. As far as I know amd still doesn't have one of those. (planned for K8l if I'm not mistaken.)

[nam-ng]

I actually meant features like the unified cache on conroe. As far as I know amd still doesn't have one of those. (planned for K8l if I'm not mistaken.)
I don't expect AMD to have a lot of use for that "feature" similar to the fact that they had no use for "Hyper-Threading", but you'd never know they may still will implement it.

If you don't comprehend what it really is -> It is basicly a Symmetric Processing feature, very good for single-tasking not so much for realtime multi-tasking. Nope, it is not made for "simultaneous multiple data streams from multiple sources to multiple destinations", non-uniform, parallelized processing which AMD designs are based upon.

[Kougar]

Intel has taken a few pages from the book on K8 with Conroe, but AMD has done the same taking a few pages from Conroe for K8L. It'll always be an endless cycle...

AMD has impressed me that they can offer 35TDP dual-core processors, however these are not as cool as one would believe by the number. I am pretty sure it was Anandtech that was the site that had power/heat numbers for all three TDP versions of the same X2 3800 processor with a few Conroe results mixed in.

AMD's first quad-core chip K8L will be using the 65nm process as well, not 90nm.

[werty316]

AMD had a small coming out party for its whole 4x4 concept today, but sadly no hardware was shown, nor were there any great revelations.

The main thing it talked about was the term 'megatasking' basically a lot of tasks, or a few really heavy tasks. To do any of this, AMD thinks you need not only four cores, but four cores and more memory bandwidth. In this, it is correct.

Power users I know all have at least two systems beside the comfy chair with their butt's impression permanently moulded into the foam - one for work, the other for gaming. The 4X4 concept seems to be all about combining those two systems into one, one that you can do all the things you want, and not see any slowdown.

The hardware itself consists of two dual core CPUs and four GPUs, hence the 4X4 moniker. AMD said there is not going to be just one 4X4, there will be a range of 4X4s, including at least two with a price under $1,000. It will also be branded FX in one way or another.

Read the Rest Here: http://www.theinquirer.net/default.aspx?article=33268

[nam-ng]

Intel has taken a few pages from the book on K8 with Conroe, but AMD has done the same taking a few pages from Conroe for K8L. It'll always be an endless cycle...

AMD has impressed me that they can offer 35TDP dual-core processors, however these are not as cool as one would believe by the number. I am pretty sure it was Anandtech that was the site that had power/heat numbers for all three TDP versions of the same X2 3800 processor with a few Conroe results mixed in.

AMD's first quad-core chip K8L will be using the 65nm process as well, not 90nm.
Unified cache designs started with Distributed Processing graphic hardware designers, not Intel's Conroes.

[Kougar]

Unified cache designs started with Distributed Processing graphic hardware designers, not Intel's Conroes.

I did not name any specific features when I said Intel took some design elements from AMD, and when I then claimed AMD took some from Intel for K8L.

Regardless of whomever invented the unified cache, Conroe was the first CPU to implement it, and Intel was talking up that design more than a year ago. K8L will not have a unified L2 cache like Conroe. K8L will actually be something like a "4x1mb" and/or "4x512kb" L2 cache. :lol: Instead AMD has choosen to have a unified pool of 2mb L3 cache shared by all four processors for K8L, which Intel has also already done with Tulsa.

After a quick check, here are a few specific things AMD will be adding to K8L, possibly "taken" from Conroe's current design if you want to go that route:

All SSE units will have 128-bit datapaths
FPUs will also have 128-bit datapaths
Reordering of loads in ROB
Out of Order Execution
AMD's own version of "macro-ops" fusion

[nam-ng]

I did not name any specific features when I said Intel took some design elements from AMD, and when I then claimed AMD took some from Intel for K8L.

Regardless of whomever invented the unified cache, Conroe was the first CPU to implement it, and Intel was talking up that design more than a year ago. K8L will not have a unified L2 cache like Conroe. K8L will actually be something like a "4x1mb" and/or "4x512kb" L2 cache. :lol: Instead AMD has choosen to have a unified pool of 2mb L3 cache shared by all four processors for K8L, which Intel has also already done with Tulsa.
That is amazing, most people can only ape the words "unified cache". AMD's Engineers actually knew when to use and when not to use "unified cache".
After a quick check, here are a few specific things AMD will be adding to K8L, possibly "taken" from Conroe's current design if you want to go that route:

All SSE units will have 128-bit datapaths
FPUs will also have 128-bit datapaths
Reordering of loads in ROB
Out of Order Execution
AMD's own version of "macro-ops" fusion
I rarely had much use for salesmen nor lawyers due to their inclement toward dishonesty, but I would take AMD's Henri Richard honest words over your baseless speculation -> AMD will pursue an "evolutionary" course. (http://www.theinquirer.net/default.aspx?article=30250)

Actual proof of existing Opterons "Out of Order Execution" utilizing 10th grade calculus baby talk. (http://www.xbitlabs.com/forum/viewtopic.php?t=8330)

[vfrex]

It isn't really fair to complain about intel or amd reverse engineering the better features of each other's processors. That is how IP is set up here. It allows underdogs like AMD to stay in competition (GOOD FOR US), despite the fact that they have a fraction of the R&D budget of Intel.

[Kougar]

Nam-ng, you are really starting to sound like yet another raving, rabid, and currently paranoid AMD fanboy by throwing around insults and name calling like that.

If I knew how to explain the difference between AMD's minimal Out of Order Execution that K8 implements and the massive difference in how Intel has implemented their Out of Order execution (Which K8L will mirror), I would try to do so. I tried to give the best explaination I know, however your posts are evidence enough that I shouldn't even bother replying to you, I'll only get bitten again.

My "baseless" information is taken from Arstechnica, Anandtech, THG, and some other sites. Such as:

Intel Core versus AMD's K8 architecture (http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2748)
Into the Core: Intel's next-generation microarchitecture (http://arstechnica.com/articles/paedia/cpu/core.ars)
AMD K8L: Quad Core Desktops And So Much More (http://www.dailytech.com/article.aspx?newsid=2388)
AMD Announces More K8L Details (http://www.dailytech.com/article.aspx?newsid=2637)
Intel's Next Generation Microarchitecture Unveiled (http://www.realworldtech.com/page.cfm?ArticleID=RWT030906143144&p=1)
K8L Architecture (http://www.anandtech.com/showdoc.aspx?i=2768&p=3)

Will K8L save the day?

AMD's best weapon against Conroe in the consumer space will probably be their forthcoming major core revision, the 65nm K8L. K8L is a pretty major evolutionary step in the K8 lineage, sort of like the move from Yonah to Conroe. David Kanter of RWT posted some K8L details a while back in his site's forum, and he now has fresh info from the analyst meeting available. Here some highlights on the new design, which is due out in the first half of '07.

Native quad-core
On-die L3 cache @ 2MB initially
Each core will have a private L2
All SSE units will have 128-bit datapaths (like Conroe), which will make for single-cycle SSE execution
FPUs will also have 128-bit datapaths
Faster HyperTransport links
Instruction fetch is doubled from 16 bytes/cycle to 32 bytes/cycle

Source (http://arstechnica.com/news.ars/post/20060602-6977.html)

[nam-ng]

Nam-ng, you are really starting to sound like yet another raving, rabid, and currently paranoid AMD fanboy by throwing around insults and name calling like that.
So far till now I saw no one in this thread had done insults and name calling but you.



Since you are unable to recognize "baseless" from "substance" I'll give you examples...


The below factual substance is based upon "simple garden-variety common sense" which only required minimal amount of intelligence.
Jittered blending of adjacent pixels caused bluriness in V5's FSAA.

The baseless crap below only required trust, faith, or belief and zero brain power.
I have 20 respected experts, 1000 weblinks, and a 3Dfx engineer who said V5's FSAA didn't blur.


The below factual substance only required 10th grade calculus education or equivalent intelligence.
By definition Symmetric Processing is in-order processing, and also by definition Distributed Processing is out-of-order processing.

All processing can be done in simple linear time domain within a period of time (Symmetric Processing - IOP – Single-Thread optimum), or that time duration period can be converted to a spectrum of channels for processing within that time period (Distributed Processing - OOP - Multi-Threaded optimum).

The baseless crap below only required trust, faith, or belief and zero brain power.
If I knew how to explain the difference between AMD's minimal Out of Order Execution that K8 implements and the massive difference in how Intel has implemented their Out of Order execution (Which K8L will mirror), I would try to do so. I tried to give the best explaination I know, however your posts are evidence enough that I shouldn't even bother replying to you, I'll only get bitten again.

My "baseless" information is taken from Arstechnica, Anandtech, THG, and some other sites. Such as:

Intel Core versus AMD's K8 architecture (http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2748)
Into the Core: Intel's next-generation microarchitecture (http://arstechnica.com/articles/paedia/cpu/core.ars)
AMD K8L: Quad Core Desktops And So Much More (http://www.dailytech.com/article.aspx?newsid=2388)
AMD Announces More K8L Details (http://www.dailytech.com/article.aspx?newsid=2637)
Intel's Next Generation Microarchitecture Unveiled (http://www.realworldtech.com/page.cfm?ArticleID=RWT030906143144&p=1)
K8L Architecture (http://www.anandtech.com/showdoc.aspx?i=2768&p=3)

[Kougar]

So far till now I saw no one in this thread had done insults and name calling but you.

Well at least I'm being upfront about it and not throwing around thinly veiled allusions in several posts. Your previous reply just underscores this, although your comments were a little more directional this time I'll admit. :P


By definition Symmetric Processing is in-order processing, and also by definition Distributed Processing is out-of-order processing.

All processing can be done in simple linear time domain within a period of time (Symmetric Processing - IOP – Single-Thread optimum), or that time duration period can be converted to a spectrum of channels for processing within that time period (Distributed Processing - OOP - Multi-Threaded optimum).

And this is relavent to Out of Order Execution how, exactly? It probably would of helped if I elaborated in my previous post that AMD plans to basically mirror Intel's current implimentation of OOE in K8L, although whether or not the are doing so because it's a logical next step or they simply want the performance advantages is a different question entirely.

[nam-ng]

And this is relavent to Out of Order Execution how, exactly?
Ha.ha...
It probably would of helped if I elaborated in my previous post that AMD plans to basically mirror Intel's current implimentation of OOE in K8L, although whether or not the are doing so because it's a logical next step or they simply want the performance advantages is a different question entirely.
Why would AMD's engineers be stupid enough to mirror Conroe's inferior OOE implementation into their brand new processor?